As is known, dynamic random access memory (DRAM) integrated circuits store information in a matrix of locations. Each location has an address which consists of a row coordinate and a column coordinate.
Partially defective dynamic random access memory (DRAM) integrated circuits are also known as audio grade random access memory (ARAM) integrated circuits. Conventionally, defective locations in an ARAM are unusable because the contents of the location is either a binary "1" or "0", and cannot be changed.
Due to the significantly lower cost of ARAMs compared to DRAMs, ARAMs are widely used in digital telephone answering device applications. In such applications, audio is encoded by an encoding process to produce frames of binary data suitable for storage. Conventionally, when using DRAMS, the frames produced by the encoding process are stored in contiguous storage locations, However, due to defective storage locations in an ARAM, storage in contiguous storage locations of the ARAM would result in unreliable audio storage and reproduction.
A conventional method of storing data reliably in an ARAM is to mask out whole rows and columns which have defective locations. Masking is accomplished by initially storing a binary zero into each storage location of the ARAM, and then storing a binary one into each storage location of the ARAM. Next, a read operation is performed to verify whether the written data matches the data that is read. If an error occurs in one of the storage locations, the addresses of a portion of the ARAM that is known to be good. The addresses of these columns and rows are masked, and consequently will not be used to store data.
A disadvantage of the mask technique is the time consuming process of scanning the ARAM locations and performing the write, read and verify steps for each location of the ARAM.
Another disadvantage of the masking technique is that some of the memory locations of the ARAM must be allocated to store the addresses of the defective locations, which reduces the amount of reliable storage locations in the memory.